From unno@post.kek.jp Fri Jul 3 22:52:45 1998
Date: Fri, 3 Jul 1998 22:52:21 +0900 (JST)
From: UNNO Yoshinobu
Subject: RE: Efficiency problem in reading 3 chips

Dear collaborators,

In testing ABCD chips on the Kapton hybrid, we have encounted another
problem when reading 3 chips. The problem is having low efficiency in
one chip and over-100% efficiency in another chip.

With help from Peter Phillips, the problem is found to be associated
with GAL (Gate Array Logic): we have been using old "SLL GAL1234 rev01"
on the LL card. The GAL programme has been updated to a new "ABC GAL
1234 rev01". By swapping the GAL (from "SLL ..." to "ABC ..."), the
efficiency problem was solved.

Here is a description of the problem by Peter.



Y.Nobu UNNO