Date: Thu, 13 Aug 1998 10:27:43 +0100
From: "P.W.Phillips@rl.ac.uk" 

SLL card for handling LVDS signals.

Some other things you might like to try, which come from discussions with
Maurice Goodricke (the BC96 designer), Tony Smith and Steve Pier, and relate
mainly to acceptable common mode ranges of PECL and LVDS signals, and
may have some contribution towards the corrupt data which we see for a few
percent of the events:

1)	Early SLL cards were equipped to output "offset PECL" signals to
	drive HAC directly.  BC96 (and maybe the old BC too) is designed to
	accept "normal PECL" inputs and early SLL cards may require a simple
	modification.  Check component D1 with a meter.  If it is a zero ohm
	link no change is needed, if it is a small diode it should be
	shorted out with a wire.  This ensures that the SLL outputs are
	compatible with BC96.

2)	Again on the SLL cards there is a jumper which can be used to select
	the voltage connected to the low rail of the input discriminator.
	The default is 0V, leading to an acceptable common mode range of
	1.4V to 3.7V.  This is right on the edge for LVDS signals and
	probably only works because voltage drops along the power cable
	offset the ABCD output signal wrt VME ground.  This jumper should 
	be moved to the -5V setting, which increases the common mode range 
	to -2.2V to 3.7V, which should be plenty.

• Is this the diode described in the above (1) (jpg)? It (at D1) does look like a diode, but when the resistance is measured, it has zero ohm in both direction...